On the Cover: SEMI's Ajit Manocha talks with Françoise von Trapp about his semiconductor journey, and how he developed the leadership skills that he puts to work for the semiconductor industry every day.
Volume 6, 2024
The Charge to
A Conversation About Leadership with SEMI CEO Ajit Manocha Page 22
Page 28 2024 3D InCites Awards Finalists
Page 50 Community Reflections: How are We Addressing the Global Talent Shortage
Page 54 The Year in Photos
CONTENTS 4 . .............. Contributing Authors 7 . .............. Editorial: This. Is. Community. ON THE COVER 22 . .............. Leading the Charge to One Trillion Dollars: A Conversation About Leadership with SEMI CEO Ajit Manocha By Françoise von Trapp, 3D InCites 9 . .............. Is Our Industry Moving Fast Enough on Sustainability? By Julia Goldstein, JLFG Communications 11 . .............. The Role of 200mm Manufacturing in Enabling a One Trillion Semiconductor Industry By Abdul Lateef, CEO, Plasma-Therm 13 . .............. The Semiconductor Cycle: Looking into the Future By Dean Freeman, 3D InCites 17 . .............. Solving the AI Puzzle By Monita Pau, Onto Innovation 20 . .............. Driving into the Future: The Next Phase in Automotive Compute Package Adoption By Prasad Dhond, Amkor Technology, Inc. 26 . .............. Five Workflows for Tackling Heterogeneous Integration of Chiplets for 2.5D/3D Kevin Rinebold, Siemens EDA SPECIAL SECTION 28 33 . .............. Adele Hars Award for DEI 35 . ............. Best Place To Work Award 36 . .............. EV Group: More than 40 Years of Growth Fueled by 3D/Heterogeneous Integration By Paul Lindner, EV Group 39 . .............. The Year in Test By Mark Berry, Test Strategies Consultant 40 . .............. Thermal Simulation of a Packaged GaN MMIC By Casey Krawiec and Erik Sanchez, StratEdge Corporation 42 . .............. Balancing Precision and Throughput in 3D Structures with Advanced Packaging and Motion Control By David Doyle, HEIDENHAIN 44 . .............. When Plasma Matters: Three Reasons to Choose Plasma By Peter Dijkstra, Trymax Semiconductor 46 . .............. Bridging the Path from University to Industry By Rene Dubois, ClassOne Technology . .............. 2024 3D InCites Awards Finalists 28 . .............. Technology Enablement Awards 32 . ............. Sustainability Award
3D InCites Yearbook
CONTENTS CONTINUED 48 . .............. Semiconductor Industry Marketing and Communications: Learning by Doing 48 . .............. Navigating the World of Semiconductors: My Journey at Megatech By Erwan Amade, Megatech Ltd. 49 . ............. Learning About Strategic Semiconductor Communication: My Internship at Kiterocket By Mindy Lok, Kiterocket SPECIAL SECTION 50 . .............. 3D InCites Community Member Reflections: How Are We Addressing the Global Talent Shortage? 50 . .............. How Trymax is Navigating the Talent Shortage By Tessa Baltussen, Trymax Semiconductor 51 . ............. Fostering Innovation from Within By Tom Bauer, Onto Innovation 52 . .............. Fueling the Workforce Through Investment and Engagement By Sophia Oldeide, ERS electronic GmbH 53 . ............. Think Globally, Act Locally By Paul Ballentine, Mosaic Microsystems 54 . .............. 2023 In Photos 72 . .............. Ad Index
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CONTRIBUTING AUTHORS Tom Bauer, author of Fostering Innovation from Within, serves as vice president of global human resources for Onto Innovation. Tom began his Onto career in 2021, and in his current role, he is responsible for leading Onto’s talent strategy the Department of Defense for several years. He began his career in microelectronics at Kyocera, worked for 6½ years at StratEdge, and most recently, was director of sales and marketing at Quik-Pak before returning to StratEdge.
Rene Dubois, the author of Bridging the Path from University to Industry, has had a lengthy career in the semiconductor industry, with experience in wet processing, rapid thermal processing and dry etch. His roles have ranged from technical and
Paul Lindner, author of EV Group: More than 40 Years of Growth Fueled by 3D/Heterogeneous Integration is EV Group's executive technology director. He heads the R&D, product and project management, quality management, business development,
field application support to global account management. Rene further honed his account management skills in the industrial market before returning in early 2023 to his career passion for semiconductor equipment at ClassOne Technology.
and process technology departments. Lindner also leads customer orientation throughout all steps of product development, innovation, and implementation in a production environment. He joined the company in 1988 as a mechanical design engineer and has since pioneered various semiconductor and MEMS processing systems, which have set industry standards. Before he was appointed executive technology director, Lindner established a product management department at EV Group. During that time, he was involved in marketing, sales, manufacturing, and on-site process support.
Mark Berry, author of The Year in Test, is an independent consultant in test strategies, operations, and business development. Past roles included fab-wide photo/etch, device engineering, and product/test ops across all chips in early-generation
including global talent acquisition, talent management, total rewards strategy, process, and systems. Talent management initiatives led by Tom have resulted in a 40% reduction in attrition over two years through a transparent alignment of organization goals and employee success. Additionally, he built a talent acquisition approach that supported the largest single-year headcount growth in the history of Onto. Tom holds a Bachelor of Science degree in interdisciplinary engineering from Clarkson University and brings over 25 years of experience to the organization. co-founder and President, of Mosaic Microsystems. He brings experience in the semiconductor industry from the perspective of private industry, academia, and government. Before Mosaic, Paul founded CEIS Products, a capital equipment company that reached $100 million and revenue and was taken public. Paul is also the Executive Director of the Center for Emerging and Innovative Sciences at the University of Rochester. CEIS is funded by New York State to promote economic development through industry- university collaboration and technology transfer. These three experiences give Paul an understanding of ways in which industry, academia, and the government can work together to strengthen the U.S. semiconductor industry through research, manufacturing, supply chain development, government investment, and workforce development. Paul Balentine, the author of Think Globally, Act Locally, is the
Dean W. Freeman, the author of The Semiconductor Cycle: Looking Into the Future is a technology advisor and a twice-monthly contributor to 3D InCites. He covers heterogeneous integration and sustainability topics as they pertain to the greater
digital phones (Motorola/Freescale) followed by roles with Amkor and UTAC test with a scope of 5000 testers in 7 countries. Mark has a BSEE from the University of Illinois at Urbana-Champaign & an MBA from St. Edward's University.
Sophia Oldeide, author of Fueling the Workforce Through Investment and Engagement is the Head of Marketing and Communications for ERS electronic GmbH, a manufacturer of thermal management equipment for
semiconductor industry. Dean has over 40 years of life experience in the semiconductor manufacturing and materials space, where he has had experience in nearly every sector of the semiconductor manufacturing process. He has worked both in the fab and for semiconductor equipment manufacturing companies. Dean is also a Subject Matter Expert at Kiterocket. Before joining 3D InCites, Dean was a research VP for Gartner tracking semiconductor manufacturing, process technology, and multiple aspects of the Internet of Things. He has also worked at FSI, Watkins Johnson, Lam Research, and Texas Instruments. Dean has nine process and equipment patents and has written multiple articles in various trade and technical journals. He holds a BS in Chemistry and Earth Science and an MS in Physical Chemistry.
Peter Dijkstra, the author of When Plasma Matters: Three Reasons to Choose Plasma, is Chief Commercial Officer at Trymax Semiconductor. He joined the team in 2021, coming from ASM Pacific Technology, where he served as director of sales, service,
Advanced Packaging and wafer probing based in Munich, Germany. She manages editorial and commercial content on behalf of the company, as well as event planning and public relations.
and marketing from 2014-2021. Before ASM, Peter spent his career working with plasma-based technologies in the semiconductor equipment space, including ALSI, Nanoplas, Tegal, Alcatel, and the Plasma Physics Research lab.
Monita Pau, author of Solving the AI Puzzle, is a strategic marketing director, of advanced packaging, at Onto Innovation. She has 15 years of experience in the semiconductor industry where she has held technical, marketing, and strategic
Julia Goldstein, author of Is Our Industry Moving Fast Enough on Sustainability? is principal at JLFG Communications, LLC. She is a writer and author with a materials science background, trade press experience, and the desire to never
Prasad Dhond, the author of Driving into the Future: The Next Phase in Automotive Compute Package Adoption, Is Vice President, Wirebond BGA & MLF Products at Amkor Technology, Inc. Prasad joined Amkor in 2014 and is Vice
business development roles in the capital equipment and material sectors of the value chain. Her expertise spans FEOL/BEOL process control solutions, as well as advanced packaging and assembly materials serving both core and specialty semiconductor markets.
stop learning. Julia writes the monthly Sustainability 101 blogs on 3D InCites. She shares her passion for materials and sustainability in her book Material Value, published in 2019. Material Value is a B.R.A.G Medallion Honoree, Finalist in the 2019 San Francisco Writers Contest, and Semifinalist for the 2020 Nonfiction BookLife Prize.
President, Wirebond BGA & MLF Products. He previously managed the Quad and Dual Leadframe product lines. Before joining Amkor, Prasad worked at Texas Instruments for 12 years where he held roles in product definition and marketing in the Analog product group. He holds a BSEE degree from The University of Texas at Austin and an MBA from Southern Methodist University.
Tessa Baltussen, author of How Trymax is Navigating the Talent Shortage , has led the Human Resources Department within Trymax since 2017. She holds a bachelor’s degree in Business Management and completed her Casey Krawiec, author of Thermal Simulation of a Packaged GaN MMIC is Vice President of Global Sales for StratEdge Corporation. He has worked for companies involved with wafer preparation, microelectronic assembly, and packaging for over
Kevin Rinebold, author of Five Workflows for Tackling Heterogeneous Integration of Chiplets for 2.5D/3D, is a technology manager at Siemens EDA, responsible for its heterogeneous packaging solutions. Kevin is
Abdul Lateef, the author of The Role of 200mm Manufacturing in Enabling a $1 Trillion Semiconductor Industry, is the CEO of Plasma-Therm. He has been with the organization since 1998 and was named the CEO in 2009. He has since led the organization
MS in Organization Studies.
a high-technology marketing professional with 24 years of experience in product line leadership and business development with a strong electronic design background. Effective communicator with a collaborative, entrepreneurial management style resulting in consistent business plan execution and delivery of industry-leading products. Passionate in working with customers to deliver innovative solutions while identifying new market opportunities to drive product line value and growth.
David Doyle, author of Balancing Precision and Throughput in 3D Structures with Advanced Packaging and Motion Control, is the President and Managing Director of Heidenhain Corporation. He joined the firm in 2016, serving as the Vice President of
through strategic growth initiatives, including completing over 10 acquisitions, to grow the company and expand its product portfolio. Abdul serves on the St. Petersburg College Advisory Committee, and he is a leadership coach at the University of Tampa. He founded the Plasma-Therm Foundation, a nonprofit focused on disaster relief and support. Abdul holds bachelor’s and master’s degrees in Mechanical Engineering from the University of Nebraska and an MBA from the University of Florida.
Sales and Marketing. Mr. Doyle has more than 25 years of sales and marketing experience in the international capital equipment business and technical support management.
25 years. After earning a BS in Mechanical Engineering from the University of Kentucky and an MBA from the University of Louisville, Casey was a design engineer for
Continued on page 70
3D InCites Yearbook
This. Is. Community. By Françoise von Trapp
When shift hits the fan -out
HEIDENHAIN explains the importance of motion control for today's advanced packaging processes that call for unprecedented speed, accuracy and precision. While being a community member isn't required to participate in the annual 3D InCites Awards, we're proud to see many members among the finalists, including DECA, ERS, PulseForge, Siemens, LPKF, Multibeam, Zeiss, Cadence, Brewer Science, NAMICS, Onto Innovation, Plasma-Therm, and NHanced Semiconductors. Check out all the finalists beginning on Page 28. This year’s cover story features SEMI’s Ajit Manocha. In Leading the Charge to One Trillion Dollars, Ajit shares his personal leadership learnings to illustrate the approaches we need to take this industry forward and shape a sustainable path to $1 Trillion. We’ve all heard the term “Pillars of the Community”. These are prominent members that stand out as key supporters. This year, I’d like to acknowledge three member companies that we consider to be Pillars of the 3D InCites Community: EV Group, KLA, and ASE Group. All three companies have shown their commitment through generous Platinum Sponsorships of the annual 3D InCites Awards for many years. And that’s only the beginning. For the third year in a row, KLA will sponsor our now-annual Hike For DEI. This year’s proceeds will support STEM education for women and under-represented minorities, through scholarships available at the technical school, community college, and university levels. For EV Group, the dedication to the community extends beyond sponsorship. EV Group’s Director of Marketing Communications, Clemens Schütte joined our newly formed Member Advisory Board and was instrumental in re-shaping the 3D InCites Awards. As EV Group is the OG supporter of 3D InCites before we even had a formal community, I’m thrilled to tap into Clemens’ industry and marcom insight. EVG is a company that fully understands the meaning of community. They’ve been investing in their local community for more than 40 years. You can read more about the vision of EV Group’s founders in the feature article, EV Group: More than 40 Years of Growth Fueled by 3D/Heterogeneous Integration, contributed by Paul Lindner. I could go on… but I’m running out of room. Suffice it to say that I’m honored to lead this community into 2024 and beyond. Remember – you get out of it what you put into it! Let’s see where the year takes us!
2023 was a year of growth and change for 3D InCites, as well as me personally. In April, I left my role at Kiterocket and the security of a salary and benefits to follow my passion and focus full time on supporting the 3D InCItes Community. It was time, and I was ready. We have things to do, and you
deserve all my focus. So here I am. Since then, we’ve grown the membership, rebooted our advisory board to better reflect the community, revamped the 3D InCites Awards, and more. 2023 was all about celebrating the community that 3D InCites has become. As of this writing, we have 62 members and counting. What began as a group of equipment and materials suppliers focused on the adoption of 3D packaging technologies has evolved into a community that represents the entire advanced packaging, heterogeneous integration (HI), 3D HI and Chiplet supply chains. In 2023 we welcomed Fraunhofer IZM as our first research technology organization (RTO) member, and IBM as the largest North American outsourced semiconductor and test (OSAT) facility. DSV IMS (inventory management solutions) became our first member not involved directly in manufacturing devices, but is a critical element in the supply chain. PulseForge joined after discovering us through their integration partner, ERS electronic GmbH, who is a long-time member. Heidenhain joined because the membership itself represents many if its customers. These are just a few examples. The pages of this issue are filled with contributed content from our regular bloggers and community members, covering the most critical topics of today. Dean Freeman looks into the future of the current semiconductor cycle. Julia Goldstein provides a status check on our industry’s sustainability efforts, Mark Berry updates us on test. ClassOne shares insights on bridging the path from University to Industry, and several members share their successes in growing their talent pipeline. From the technology perspective, Amkor talks about the next phase of automotive compute, Trymax Semiconductor provides tip on when to use plasma processes, StratEdge explains the thermal challenges of packaging GaN devices, and Siemens shares five workflows for tackling HI of chiplets for 2.5D/3D.
We clean it up with Adaptive Patterning
3D InCites Yearbook
Is Our Industry Moving Fast Enough on Sustainability? By Julia Goldstein, JLFG Communications
Awareness and discussion are only the first steps, however. We need more aggressive action. We need all companies throughout the supply chain to invest in improvements. That will require changes in design, materials, and processes, increasing R&D expenditure. Those expenses need to be seen as investments in the future of the companies, our industry, and society. Looking at Progress As the SCC report and other analyses have noted, energy use is the change that will make the most difference. That includes switching to renewable electricity to power fabs and other manufacturing facilities and reducing energy consumption. Many companies are already doing this. Some goals seem overly modest, however. For example, according to its latest sustainability report, ASE pledges to decrease annual power consumption by “more than two percent” by 2030. We can look at that and wonder why they can’t do more. There’s more to the story, though. In 2022, 87 percent of the company’s facilities used some renewable energy. ASE plans to more than double the percentage of its energy that comes from renewable sources. That’s encouraging, but the starting point is 19 percent. Some companies—Intel, Samsung, and others—are already at 100 percent renewables. But many are far behind that. It will take a lot to get the entire industry to 100 percent. This is merely one example. I could comb through sustainability reports and gather dozens more. The upshot is that companies are doing the work to set goals and report on progress toward them. At the same time, the goals could be more aggressive to encourage revolutionary changes rather than incremental improvements. Are Our Hands Tied? The semiconductor industry faces fundamental limitations in transitioning to renewable power and removing gases with high global warming potential (GWP) from the manufacturing process. Intermittent electricity sources like solar and wind need to be combined with energy storage or other backup sources. Island nations have limited land area for building up solar power. But they also might not be using all the resources available to them. Process gases remain a major source of Scope 1 emissions. There are some applications where alternatives exist and many where they currently do not. Abatement techniques limit the release of these gases into the atmosphere, but they are not foolproof. A small
We continue to deal with a paradox: semiconductor chips are necessary to support digitalization and society’s transition to lower carbon power and transportation. At the same time, semiconductor manufacturing is resource- and energy-intensive. Efficiency improvements are one part of the solution, but they can only take us so far. What does our industry need to do to reduce absolute greenhouse gas (GHG) emissions to a level compatible with a 1.5 °C rise in global temperature? The answers point to significant challenges. Are we willing and able to completely change some of our processes? That remains to be seen. Where We Are SEMI’s Semiconductor Climate Consortium (SCC) is bringing the industry together to discuss environmental issues. As of November 2023, 88 companies have joined as members. The SCC’s 2023 report, Transparency, Ambition, and Collaboration: Advancing the Climate Agenda of the Semiconductor Value Chain, outlines the current situation and opportunities for improvement. As the report notes, larger companies have been working on reducing GHG emissions, increasing the use of renewable energy sources, and improving water and waste management for years. Water recovery systems are established throughout the industry and continue to improve. Still, progress is not fast enough. Even if companies achieve their pledged emissions reductions, the industry is not on target to reach science-based targets for a 1.5°C global temperature rise. Absolute emissions are still going up, in large part due to industry growth. They are not forecast to drop until at least 2030. I applaud SEMI for gathering companies to collaborate on sustainability initiatives. Awareness is one of the first steps; the report lays out how things look. Everyone in the industry should read it and consider how their company can address its shortcomings in any of the areas the report highlights.
3D InCites Yearbook
The Role of 200mm Manufacturing in Enabling a $1 Trillion Semiconductor Industry By Abdul Lateef, CEO, Plasma-Therm
its new headquarters building. Brewer Science purchases enough wind energy credits to cover all the energy consumption at its US facilities. The company’s electricity consumption has remained constant despite growth. Namics and Brewer Science are among the materials suppliers reporting on GHG emissions, energy consumption, and water and waste management. We need more data, along with concerted efforts to promote science-based targets, from every supplier in the industry. The Path Forward Increasing energy efficiency and transitioning to renewables are the easiest levers to pull and will make the quickest difference. We also need to invest in changes in materials and processes. The journey will take years or perhaps decades. There are ways to accelerate it. That includes supporting promising startups that are innovating in areas like waste recovery, new materials, and energy efficiency. De-coupling economic growth from energy and resource consumption is something our industry will need to embrace. That’s not easy, especially when faced with materiality assessments that show environmental issues lagging behind economic concerns. That can make GHG emissions reductions and better waste management not feel like immediate priorities. Unless customers care deeply enough about their vendors’ and suppliers’ sustainability records, change is likely not to happen fast enough. A few companies are being proactive and sharing their progress. Here’s to hoping that more join in.
proportion of gases still escape. The path forward to eliminate the worst-offending gases is not clear. But that doesn’t mean we should give up. Most GHG emissions associated with our industry’s products happen during use. We cannot directly influence how end users power their computers, data centers, or automobiles. But we can design semiconductor chips and packages to be as energy- efficient as possible. We can also support improvements in renewable energy in the countries where our facilities operate. That may come from purchasing credits or investing in building renewable power infrastructure. One point from the SEMI report that people might have overlooked is the call for advocacy. Manufacturers, especially in Asian countries where renewable energy is limited but also elsewhere, should advocate for expanding low-carbon electricity options. If the demand is there, the supply is more likely to follow. Smaller Companies Making Progress The actions of smaller companies—those with fewer than 1000 employees—don’t always make headlines. Our industry needs these companies, many of which make materials and components that contribute to the Scope 3 emissions of the prominent industry leaders, to step up. Fortunately, some are moving sustainability further up the list of priorities. Namics, for example, is investing in solar farms in Japan and plans to build a solar canopy over the parking lot at
Another hurdle that non-300mm manufacturing can help to mitigate is capacity overinvestment. For years, the global semiconductor industry overinvested first in LED capacity; and then in RF devices. The most recent example is GaAs for RF applications. GaAs fabs are running at a 30-35% utilization rate – primarily because, for every successful GaAs device maker, another three to four fabs have been established, creating overcapacity. The next technology where this could happen again is SiC – the current investment volumes may lead to oversupply in the next few years. The key takeaway is that investment needs to be more strategic and less reactive. If everyone continues overspending and wasting resources while trying to get to $1 trillion, it becomes a bigger hurdle. More collaboration in strategic planning would help conquer this challenge – multiple companies coming together to agree on who invests in what over the longer term. This is a tall order, certainly, but it may become a must- do if we are to break the cycle of overspending/oversupply.
The “and below” of “200mm and below” must not be overlooked. Gallium arsenide (GaAs) devices, widely used for LEDs found in optical communications and control systems, are fabricated on 150mm wafers. Moreover, we’re not talking about wafers alone – a more accurate descriptor for this market may be “non-300mm,” to include panel manufacturing for advanced packaging solutions such as panel- level fan-out devices. 200mm Manufacturing Overcomes Hurdles There are a few hurdles on the path to $1 trillion that the industry will need to develop strategies to cope with and/or maneuver around. First is the current geopolitical environment. While this doesn’t directly impact non-300mm, as these tools are not on the restricted list, 200mm silicon was neglected for a long time because of the focus on leading- edge devices. Chipmakers’ overall strategic planning and investment are now shifting to address the importance of lagging-edge technology nodes, as evidenced by the surge in new 200mm fabs. Transitioning some manufacturing to 200mm and below can ease competitive forces, enabling cost savings and optimized production volumes, helping to drive revenues.
The global semiconductor industry is growing steadily as integrated circuits (ICs) are now a pervasive part of our everyday lives. Despite recent supply shortages and other challenges, semiconductors are nevertheless projected to become a US$1 trillion industry by 2030, with more than two-thirds of overall growth expected to be driven by automotive, computing/data storage, and wireless technologies. While the lion’s share of this total will belong to advanced devices manufactured on 300mm and larger wafers, the 200mm manufacturing segment has a vital role to play in helping the industry reach a $1 trillion valuation. The 200mm and below market is highly segmented, covering many different areas such as power devices, discretes, LEDs, sensors, and others. These areas overlap with the top-level end-market drivers. For example, in the computing space, what comes to mind initially is leading-edge semiconductors for memory and logic, as they’re the primary drivers for computing, followed immediately by chips for artificial intelligence (AI) and big data analytics. From the 200mm perspective, if you are missing the non-leading-edge devices that go around that memory and logic, you still won’t have a functioning computer system – thus, while 200mm and below devices in computing may not be enabling, they are essential. The other top-line end markets are less than 300mm centric. Communication will depend more on RF devices, while in automotive, the fastest-growing semiconductor content is power devices built on compound semiconductors such as silicon carbide (SiC) and gallium nitride (GaN); as well as sensors. For these devices, 200mm and below manufacturing is an enabler; even 300mm content in automotive won’t be leading-edge.
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Figure 1: The chiplet concept disaggregates SoCs to make their functionality more widely available.
3D InCites Yearbook
The Semiconductor Cycle: Looking Into the Future Dean W. Freeman
“It ain’t over till it's over.” is a frequently used Yogi Berra saying. The current semiconductor cycle has that feeling. While for some parts it appears to be over, for other parts it looks like most segments are at the bottom, and there are no strong growth indicators for the industry. A bit over a year ago, in the second quarter of 2022, the memory and processor companies were tipping rapidly into a downturn with the first hints of either quarter- over-quarter or year-over-year decline. Companies in the microcontroller and analog space servicing the automotive segment were still seeing flat to positive growth as the automotive space was still experiencing shortages for some chips. The semiconductor equipment industry was still chugging along and would not see the initial impact of the slowdown until either calendar Q1 or Q2 of 2023. As the semiconductor industry closed out 2023 and moved into 2024 the outlook was still cloudy. Starting in the second quarter of 2023 the memory and leading- edge logic segments started to see positive momentum. Conversely, the microcontroller, analog, and power side of the business looked at a soft Q4 2023. Infineon announced a 5% growth rate for its next fiscal year.
The equipment side of the business gave mixed signals for 2023 of up and down, depending upon which business segment and geographical they are the strongest. The Silicon Industry Association (SIA) data in Figure 1 shows the shape of the last cycle and the start of the rebound as the industry moves into 2024.
Figure 1. Month-to-Month WSTS data. (Source: WSTS Data)
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for a negative year from a growth perspective. Typically, when there is a downturn, revenues are down across the board, so the automotive and power semiconductor growth is one of the unique aspects of this cycle. As renewables drive the electrification of the grid and the electric vehicle (EV) market continues to grow, it will be interesting to see if the automotive and power semiconductor industries continue to have a different cycle than the computing and consumer segments. In the equipment segment, there were significant pushouts at the leading edge in 2023. There were also delays with the first TSMC fab in Phoenix. The restrictions in China also had an impact, but not as significant as first feared, and some equipment companies had great years in China. In China and the world, the power, automotive, communication, industrial, and IoT segments kept on purchasing equipment. According to Trend Force, in China, there are currently 22 or 23 fabs in different phases of construction and 10 more planned. The bulk of these are projected to be 28nm and above with fifteen 300mm and eight 200mm (Figure 2). This is a significant amount of equipment as some of these fabs, when completed, will be running 100,000 wafer starts per month. Depending upon the equipment sanctions, China's manufacturing growth will continue to be a driver for equipment sales during this next cycle. Silicon Carbide (SiC) for electrification and EV will be a key growth area for 200mm fabs. Will We See Growth in 2024? Where does it look like the industry will end up in 2023 and what are the assumptions for growth in 2024? When writing this article, the latest published SIA numbers ran through September of 2023. The chip industry needs to see approximately 4% growth quarter-over-quarter to hit the WSTS forecast of a 10% decline. This would put chip revenues at $515 billion for 2023. Q3 revenue grew 10% over Q2 so hopefully it’s safe to say that there is an opportunity for some upside to those numbers and the year will end a little better than currently forecasted. On the equipment front for the top few companies, revenue growth looks like it will range from positive 29% growth to a 25% decline, so now it will be challenging to determine where equipment will end up for 2023 until the final numbers are in. The Chinese equipment companies are having a banner year, which will also help the year-end number. For the fourth quarter of the 2023 calendar year, ASML is forecasting a positive 4% growth in Q4 over Q3. Other equipment companies are forecasting flat to slightly down growth for Q4 calendar year 2023. So, while chip revenues are improving, it looks like the equipment segment is taking a short breather as it moves into 2024. For 2024 the most recent forecast on the chip market is by IDC predicting a 20.2% growth. The WSTS spring forecast predicted 11% growth for 2024, which will likely see an upgrade in the fall 2023 report. Other reports are starting to emerge, and currently, they are falling in between the above predictions.
Depending on your point of view, the current semiconductor cycle started in late 2019, with a brief hiatus due to the pandemic, and then kicked into high gear in the second half of 2021. At its Industry Strategy Symposium (ISS), in 2022, SEMI predicted that $1 Trillion in revenue for the semiconductor industry was achievable by the end of the decade. As the chart shows in May 2022, month-to-month semiconductor revenues started to decline. In the November 2022 timeframe, analysts were cautiously optimistic about the downturn. Gartner had a decline of 3.6% and in the WSTS fall 2022 forecast, its analysts were predicting a 4.1% decline for 2023. On the equipment side, SEMI was forecasting a decline of 16.8% for 2023. At ISS 2023, the analyst panel consensus was that semiconductor revenue would decline by approximately 5%. The one exception was Malcolm Penn of Future Horizons, who predicted a 20% decline in semiconductor revenue with a rebound in 2024. On the equipment side, the consensus was a 15% to 22% decline with a rebound in 2024. Mark Thirsk of Linx Consulting predicted a two-year downturn for equipment with a 13% downturn in 2023, and 27% in 2024. For the record, at that time a two-year equipment downturn was looking likely. What Actually Happened Forecasting is an inexact science that depends heavily on your assumptions, as well as your instincts, as no two downturns are alike and something from outside the box can come along and significantly change those assumptions. What happened in 2023 and where does it look like the industry is headed for 2024? Two of the many assumptions for 2023 were that China would see a strong second-half recovery and that 5G and China would help to drive mobile phone purchases and thus provide some bright spots during the year. These assumptions would help memory recover, and drive some logic revenue. Neither of these assumptions came to be. As a result, memory prices continued to decline throughout most of the year, only stabilizing when inventories had been worked through or written off, resulting in a revenue decline of greater than 30% for the segment dependent upon Q4 23 growth. Companies building computer and mobile processors also saw greater than a 10% decline in revenues for those segments with 10% being the high side. Bright Spots in High Bandwidth Memory The key positive drivers for memory in 2023 were high-bandwidth memory (HBM) for artificial intelligence (AI), and automotive applications. AI and automotive were segments that had positive growth across the industry. For microcontroller units (MCU) and power chip manufacturers, automotive and electrification led to a positive year for most of those manufacturers. This led to a bit of an unusual year where the MCU and analog manufacturers reported growth, while the memory and PC and mobile logic manufacturers headed
Figure 2: Map of new fabs being constructed in China. (Source: Trend Force China Fab Analysis.)
On the equipment side, demand will be driven by equipping the new advanced fabs coming online in 2024 and 2025. China will likely continue to have strong demand for equipping its fabs. A key part of the equation is how fast will the capacity that has been taken offline during this downturn get re-adsorbed. Foundry utilization rates are currently in the 70% range and it is likely that the memory fab utilization is in a similar range. Thus, the equipment forecast for 2024 depends heavily on end demand and improving fab utilization before equipment purchases will see a significant pickup. While chip forecasts in the fourth quarter will likely come out in the 10-20% range, due to what seems a stronger- than-expected 2023 for semiconductor manufacturing equipment, it's possible that equipment sales will start the year slow, and then begin to ramp in the second half of 2024, ending the year close to the positive 10% number that has been predicted. However, there are a lot of assumptions that must fall into place for that to happen. In the third quarter of 2023, consumer spending was slowing. Analysts will need to determine if this trend continues into 2024 as they make up their forecasts. Yogi Berra also is reported to have said it's tough to make predictions, especially about the future. I expect 2024 to be one of those years until the drivers for growth clearly emerge.
Key Drivers for Recovery What are the key drivers for the recovery? According to the most recent Gartner forecast, IT spending will increase by eight percent. Data center systems are the biggest driver with 9.5% growth year-over-year as cloud and AI data centers continue to expand. The PC market is expected to be at 4.9% growth according to Gartner. Mobile phone growth will be in the same vicinity depending upon the success of the recently released models. Increases at the system level will drive chip growth but, how does the chip industry get to 20& growth? From a chip perspective, the stronger asking selling price (ASP) for HBM DRAM, and higher performance DRAM for systems such as EV, will be the key driver for memory growth. NAND is expected to see growth later in the year as the need for storage grows. Prior to and in the Q3 earnings announcements, Intel, AMD, QUALCOMM, Samsung, and Nvidia discussed processors for a new AI-enabled PC and AI mobile applications that would become available in 2024. These new devices would use a processor designed to enable personal AI performance and move AI from the cloud to the local device. Depending upon the demand, these new devices could be a market driver for higher-end chips with higher ASPs before the end of 2024. The question to ask is whether industries or consumers are enticed to purchase these new PCs and mobile devices.
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Solving the AI Puzzle By Monita Pau, Onto Innovation
machines. AI is used to classify machines that mimic human intelligence and human cognitive functions like problem-solving and learning. Generative AI: This subset of artificial intelligence uses techniques (such as deep learning) to generate new content. For example, you can use generative AI to create images, text, or audio. Machine Learning (ML): This subset of AI focuses on prediction and classification tasks. Machine learning is AI that can automatically adapt with minimal human interference. Deep Learning: This is a subfield of machine learning that uses artificial neural networks to mimic the learning process of the human brain. It focuses on neural networks to solve complex problems. Each one of the above applications benefits from or needs high-performance computing capability. Now that we have discussed AI let’s explore the packaging challenges of 2.5D AI devices further. This article will focus on the challenges associated with through-silicon vias (TSVs), microbumps, and AICS. TSV Challenges TSVs are a key piece of the puzzle for the construction and performance of both 2.5D and 3D packages. Designed with extremely small critical dimensions, high-aspect ratios (HAR), and fine pitches, TSVs enable high numbers of inputs/outputs and provide vertical electrical pathways for HBM and silicon interposers (Figure 1).
An AI package is like a puzzle made up of individual pieces of different sizes and shapes, each one essential to the final product. Together, these pieces are typically integrated in a 2.5D IC package designed to reduce footprint and maximize bandwidth. A graphic processing unit (GPU) and multiple 3D high- bandwidth memory (HBM) stacks provide the major pieces in the AI puzzle. These puzzle pieces are first assembled on top of a silicon interposer. An advanced IC substrate (AICS) provides the foundation on which the 2.5D package is built. While we could go on at great lengths to discuss the manufacturing of each of these AI puzzle pieces, for this article, we are focusing on the advanced packaging side of the process – the glue that holds all the pieces together – and the many manufacturing challenges of a 2.5D IC package. But before we get into that, let’s talk about what AI is Forget what the movies have told us. AI today has little in common with sentient machines dedicated to serving or enslaving humanity. As we know it, AI is simply a new type of technological tool. It does what other tools do: enables its users to complete tasks with more efficiency and ease. The following is a list of the different types of AI, a list that, fittingly, was created using generative AI. and what AI isn’t. A Word About AI Artificial Intelligence (AI): This is a broad term that encompasses all aspects of creating intelligent
3D InCites Yearbook
Another area of concern involves the unique nature of the AICS process. For wafer-based devices, the active circuitry construction only happens on one side of the wafer. But for AICS, both the front-side and the backside of the panel will be processed. This significantly increases the risk of yield loss from defects caused by surface contamination. In addition, AICS has relatively few packages per panel. For example, a 510mm x 515mm AICS panel can only accommodate 16 packages (120mm x 120mm) compared to fan-out panel-level packaging (FOPLP), which could have over 2,300 packages. In other words, one defective package on an AICS could result in a 6.25% yield loss, whereas with FOPLP, one defective package may represent a 0.04% yield loss. As AICS package sizes increase to 150mm x 150mm, yield challenges are exacerbated: a single defective package failure results in an 11% yield loss. Plating, dry film resist and buildup film lamination non- uniformity, RDL line defects, and more subtle buried defects, such as under-laminate bubbles and particles, can all contribute to yield loss. More stringent process control via metrology measurements and inspection after each critical step alerts manufacturers of a potential process excursion so that immediate corrective action can be taken. AICS manufacturing is a lengthy process and takes weeks to process both sides of the panel. As such, the real-time tracking of yield at every layer can help reduce the amount of time spent on processing defective substrates. Conclusion Advanced packaging is just one piece of the AI puzzle, but in this More Than Moore era, the back end of the process is more important than ever. In this article, we’ve outlined several key challenges facing the advanced packaging of AI devices, from measuring CD and identifying defects related to TSVs and microbumps to the real-time tracking of detective packages in the AICS production process. With the AI market driving current semiconductor industry growth, the solutions described here will become key pieces to completing the puzzle of how to meet the rapidly surging demand for AI packages.
Speaking of RDLs, a large landing pad at the end of each interconnecting line/space (L/S) connects to the vias. The landing pad is significantly larger than the critical dimension of the RDL. This helps increase overlay tolerance. However, these large landing pads limit design space. This problem will only be exacerbated as the interconnect technology demands finer L/S. This results in the need to increase the number of RDL layers, along with an increase in cost and potential yield loss.
Much like TSVs, microbump technology continues to scale downward, decreasing height, diameter, and pitch. Further shrinking is expected and eventually calls for using direct Cu-Cu hybrid bonding. A primary downside of this shrinkage is maintaining plating uniformity of the bump — both within the die and across the whole wafer. This becomes more challenging. For the die to properly attach to the next component — whether it is DRAM, logic buffer die, interposer, or IC substrate — these bumps need to be the same height to ensure proper connections. Measuring the individual thicknesses of each of the metal films used to construct the bump is also important. The choice of metal and its respective thickness are critical in controlling the performance and reliability of the device. Another potential stumbling block with microbumps is related to defectivity: the presence of residues, cracks, voids or to an even greater extent, where the microbump is damaged or displaced. In extreme cases, these defects result in immediate electrical shorts or failed connections. However, the impact of some of these defects may not be apparent at first but slowly evolve over time and affect device reliability. Each of these challenges, if not properly addressed, will impact device performance. An opto-acoustic metrology tool using picosecond ultrasonic technology can measure both individual metal film thickness and the final total bump height. A combination of 2D/3D metrology and inspection tools can measure bump diameter and bump height, as well as detect defects, delivering in-line process control.
Figure 1: Depiction of high aspect ratio through silicon vias.
The TSV process is intensive and requires several key process steps, including etch, deposition, fill, and chemical mechanical planarization (CMP). With the demand for thinner silicon die, decreasing TSV size, and, in some cases, even higher aspect ratios, controlling the exact size and depth and finding increasingly hidden defects, is essential to maintaining high yield. Top and bottom critical dimension (CD), sidewall profile, and depth are all important process control parameters for TSV manufacturing, as they can affect electrical performance between the stacked die. If the TSV is not etched deep enough, the two dies will not be connected even if they have been placed on top of each other. Next, the barrier/liner material is deposited with good uniformity and thickness control. Electro-plated Cu fills the TSV, where measuring the overburden thickness — as well as inspecting the Cu fill for growth defects and voids — is critical. As for the backside of the wafer, the front of the wafer will be temporarily bonded to a carrier so the backside can be thinned to reveal the TSVs. The thinning process is important. The remaining silicon of the etched TSV must be measured and monitored for grind and blanket etch to ensure TSV interconnects are evenly revealed for stacking the chip or entire wafer. Failure to accurately measure and inspect the backside can lead to defects, distortions, electrical resistance, and device failure, which ultimately leads to increased scrap and decreased yield. Tools that are useful to address the above challenges include metrology for advanced OCD and HAR structures and an automated high-speed sub-micron defect inspection and 2D/3D metrology system. Microbump Challenges in addition to TSVs, microbumps are also a key element providing the interconnections between the different components within the AI package. Besides connecting the individual DRAM layers and the logic buffer die within the HBM stack, microbumps connect the 3D memory stacks and the GPU to the interposer. Larger solder bumps also connect the interposer to the advanced IC substrate (AICS) (Figure 2).
Figure 3: Focus on advanced IC substrates.
To mitigate this design quandary, smaller RDL landing pads are required. This can be achieved if the process overlay is improved. To accomplish this, a lithography system must analyze and compensate for distortion errors caused by the repeated thermal cycling of the copper-clad laminate (CCL) panel and dielectric throughout the buildup process. Accurate metrology data is needed to generate an optimum alignment solution. However, this data is typically available after the lithography process is completed and the overlay of the vias to the RDL landing pad is measured. It is important to analyze this overlay data and feed corrections back to the stepper to compensate for the panel distortion of future panels.
Figure 2: Focus on microbumps.
AICS Challenges As input/output (I/O) density increases, the ability of individual components to mate directly to the printed circuit board becomes an issue. This is where AICS enters the process as a piece of the AI puzzle. AICS acts as the bridge between the package’s individual components (Figure 3). To connect the interposer above —and the die connected to it — a high number of redistribution layers (RDL) are needed. As the number of RDL layers increases, so does the possibility of overlay errors.
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