investigated along with dielectric materials as well as the copper properties of the pads. Even variations of wafer shapes are modulated to simulate the impact of different device wafer setups in logic, DRAM, and 3D NAND flash. Recently at the 2024 IEEE Electronic Components and Technology Conference (ECTC), EVG and imec reported achieving wafer-to-wafer direct hybrid bonding with electrically yielding interconnect pitches down to 400nm 7 In addition to 3D SoCs, EVG and imec are also collaborating on the scaling of fusion bonds for 3D stacked devices. Besides being used for backside power delivery networks (BSPDN) for splitting signal lines and power lines of a transistor into different planes using wafer-to-wafer bonding, fusion bonding is being explored further for more futuristic devices. One example is complementary FETs (CFETs), which could be the first stacked transistors to use wafer-to-wafer bonding to enable efficient integration of nMOS and pMOS on top of each other. Another successful development is the transfer of transition metal dichalcogenides (TMDs), a class of atomically thin, layered semiconductor materials, which are even further out and discussed to be implemented by 2035 as a replacement for the pMOS in CFETs to enable even greater performance increases. In a joint paper at the 2024 Symposium on VLSI Technology and Circuits, EVG and imec demonstrated the successful transfer of high-quality tungsten disulfide (WS2) as a TMD material on 300-mm wafers 8 . Recently, our joint development activity has focused on EVG’s LayerRelease technology, a novel IR laser release method. In this collaboration, the co-optimization of films and integration processes is conducted simultaneously. This enables the LayerRelease process to replace mechanical debonding with IR laser release in packaging processes. More importantly, LayerRelease enables full integration capability in front-end-of-line processes as it is 100 percent front-end process compatible. Imec’s extensive integration and application-based research significantly benefit the technology, making it a unique setup in Europe and a leader on a global scale. Fraunhofer – Fraunhofer has been another close research partner for many years, and EVG has collaborated with Fraunhofer in several areas, including UV laser debonding for heterogeneous wafer-to-wafer and die-to-wafer integration, as well as wafer-to-wafer hybrid bonding for system integration. Fraunhofer is also among our partners that utilize our centers of excellence such as the Heterogeneous Integration Competence Center (HICC) to complement customer development in their cleanrooms. Working together at our HICC, several industry-first device implementation flows have been generated and successfully transferred to European customers. CEA-Leti – CEA-Leti's fundamental research in the field of wafer bonding and other process-relevant influencing factors complements EVG’s own development work. A clear example of this collaboration is based on a high- vacuum bonding technology called EVG ComBond. Various new types of oxide-free material compounds are being researched in this field in order to enable conductive, transparent and atomically smooth bond
Several new rounds of calls for proposals have been issued in 2024, including: • A proposal for a pilot line on advanced photonic ICs, which are expected to be critical for next- generation high-performance computers, high-speed communications, and data centers. This call for proposals recently closed in September 2024. • A proposal for the creation of “competence centers” to provide access to technical expertise and experimentation in semiconductors, something that some equipment companies such as EV Group have already implemented for their customers and partners. This call for proposals recently closed in October 2024. • A proposal for the creation of a cloud-based online design platform that will allow users, particularly academia, start-ups, and SMEs, to design and develop their new chips, and to help bring their designs to market. • Several proposals to fund pilot lines for quantum chips focused on stability and trapped ions, respectively, targeting applications such as solving complex optimization problems in logistics and supply chain management, accelerating drug discovery through molecular simulations, enhancing cybersecurity with advanced encryption methods, and improving artificial intelligence and machine learning algorithms. 6 Bringing Triple-i to the European Chips Act Through bold action, the EU has undertaken an ambitious journey to reinvigorate the European semiconductor industry and bring about a new “chip renaissance.” However, government funding alone can only move the needle on semiconductor innovation so far. Increased collaboration between companies and research institutes across Europe is also essential. In the case of EV Group, since our founding more than 40 years ago, we have been actively engaged with research institutes, universities, and suppliers across the semiconductor value chain in Europe. These collaborations give us access to world-class expertise to develop key technologies and apply our leading-edge solutions to address real-world industrial applications. A central tenet to our Triple-i philosophy of “invent-innovate-implement” is our focus on engaging with world-leading organizations to accelerate the development and commercialization of new technologies that drive future innovations in the semiconductor industry. Here are a few examples of important collaborations we have undertaken with leading European organizations, many of which are backed by EU-funded projects: Imec – EVG and imec have been strategic technology partners for years with a key focus on developing wafer- to-wafer fusion and hybrid bonding. Our collaborations focus on a system-level holistic approach, where all influencing factors are considered to scale integration and effectively reduce interconnect pitches. Among the influencing factors, the design of hybrid bond contacts is
many other industry-leading companies, universities, and research institutes headquartered in Europe round out the supply chain from design IP, materials, and critical components needed for semiconductor manufacturing. Europe has also been a historic leader in semiconductor and micro-electronics device manufacturing, particularly in the areas of MEMS and sensors, power devices, and microcontrollers for the consumer electronics, industrial, and automotive markets thanks to Infineon, NXP Semiconductors, STMicroelectronics, and numerous others. However, despite holding about a quarter of the world’s semiconductor production 25 years ago, Europe represents less than 10% of global semiconductor production today, making the region particularly vulnerable to supply chain disruptions and geopolitical challenges. To reverse this trend and bolster Europe’s competitiveness and resilience in semiconductor technologies and applications, the European Union approved the European Chips Act (ECA) in July 2023, aiming to mobilize more than €43 billion in investments by 2030. The goal is to double Europe's global manufacturing market share from 10% to 20% by 2030. In November 2023, the European Commission launched the Chips Joint Undertaking (Chips JU) under the ECA. As part of its charter 1 the Chips JU will: • Set up pre-commercial, innovative pilot lines, providing industry state-of-the-art facilities to test, experiment, and validate semiconductor technologies and system design concepts, as well as provide for small-scale production • Deploy a cloud-based design platform for design companies across the EU • Support the development of advanced technology and engineering capacities for quantum chip • Establish a network of competence centers and promote skills development The pilot lines are a critical component of this effort, serving as a platform for European research and development with an industrial perspective to bridge the gap from lab to fab. In April 2024, the Chips JU completed its evaluation of various pilot line proposals that had been submitted to the group, and selected four proposals that have been approved by the EU and are starting now: • NanoIC: sub-2-nm system-on-chip pilot line; hosted by imec; focusing on advanced logic, memory and interconnect technologies such as gate-all-around nanosheets, CFETs, high-NA EUV lithography, spin-orbit torque magneto-resistive random-access memory (SOT-MRAM) architectures, 3D electrical interconnects for scaled-pitch die-to-wafer (D2W) hybrid bonding and high-density redistribution layer technologies, and optical interconnects for D2W hybrid bonding 2 (Figure 1).
Figure 1: Imec’s headquarters campus features semiconductor clean- rooms and state-of-the-art labs. Shown here is the imec tower and cleanroom. ©imec. • FAMES: fully depleted SOI pilot line; coordinated by CEA-Leti; focusing on FD-SOI (with two new generation nodes at 10nm and 7nm), embedded non-volatile memories (OxRAM, FeRAM, MRAM, and FeFETs), radio-frequency components (switches, filters and capacitors), 3D heterogeneous integration and sequential integration, and small inductors to develop DC-DC converters for power management ICs 3 . (Figure 2)
Figure 2: For nearly six decades, CEA-Leti has been pioneering innova- tion in micro- and nano-technologies. Shown here is Leti’s facilities in Grenoble, France. ©Pierre Jayet. • AHSI: advanced heterogeneous system integration pilot line; led by Fraunhofer; focused on the development of advanced packaging and integration technologies that combine various semiconductor materials, circuits, or components into a single compact system—utilizing innovative techniques like System-in-Package (SiP) and 2.5D/3D integration to enhance the performance and functionality of semiconductor devices. 4 • WBG: wide bandgap pilot line; coordinated by Italy’s National Council of Research; to be built in Catania, Italy; focusing on materials such as silicon carbide (SiC) and gallium nitride (GaN) that allow electronic devices to operate safely at much higher voltage, frequency, and temperature than standard silicon- based counterparts with unmatched efficiency gains for developing highly efficient power systems in electric vehicles, lighter-weight electronics, and radio-frequency equipment. 5
3DInCites.com
3D InCites Yearbook
30
31
Powered by FlippingBook