analysis, reliability analysis, and test that start up front during planning. Also, as parts are delivered for manufacturing, test factors both for the individual chiplets as well as the complete system-in-package (SiP) must be generated. To support the needs in all these key areas, we are developing four 3DKs to provide a comprehensive set of design enablement kits that support the design, verification, analysis and testing of 3D IC designs. • Chiplet Design Kits (CDK): Recommended chiplet models to support the integration into a 3D IC design • Package Assembly Design Kits (PADK): Chiplet IO/TSV pitch spacing rules, substate/interposer width/ spacing, routing rules, and general-purpose package component placement rules • Material Design Kits (MDK): Composite material properties for package components to support electrical and reliability analysis • Package Test Design Kits (PTDK): Defines test IO pins, dimensions, and function to support ATE test hardware and testing Chiplet Design Kits CDK models are created or reused for early architectural, test, and physical design planning. These are the models that are required to design a chiplet. So, the first thing the CDX group did was determine the design models required to integrate a chiplet into a package. Our first effort involved working with the JEDEC group. The JEP30 PartModel was designed to describe electronic components used in a PCB design. As we were trying to do a similar thing for 3D ICs, we asked them to help us extend that part model to support chiplets. Together we came up with a list of chiplet design models that we recommend be included with a chiplet. The idea is that we could eventually have reusable chiplets out in the marketplace. And we drove that extension to the JEP30, the PartModel, back in January of 2023. That is now a JEDEC standard.
We next developed checklists for other formats and recommended the models required to support design analysis. At a minimum, we have a checklist to know what models are available. A chiplet designer or chiplet provider can define which models are available. There are also provisions where we can include the models, and that's really up to the chiplet provider if they want to include that in the part model. Package Assembly Design Kits Today, we are actively working on the package assembly design kits. These include the rules for defining pitch, spacing, and the type of connectivity components used to connect the chiplets to the interposers and substrate. In keeping with our guidelines, they are in a machine- readable format, and they are EDA-neutral. Thus, each of the EDA vendors, assuming they’re supporting these formats, would be able to take those rules from a single source. This results in much cleaner access for the FABs and the OSATs during manufacturing, because they can provide these rules in one format that all the EDA tool vendors can use. With access to this information and these machine models, the PADKs can be used for scripting directly in some of the EDA tools. Material Design Kits Another area we are working on is material design kits. These are a truly novel idea. When engineers are doing analysis—whether it be thermal, stress, signal integrity, or power integrity—the MDKs can define the material properties that are in the package components inside the package. Again, the idea is to put these in a machine- readable format, rather than having that information derived ad-hoc from the vendors and material providers and manually input into the tools. Then the tools would use the MDKs to use that material information directly for analysis. Package Test Design Kits As the name implies, package test design kits are for test. The chiplet model contains a lot of information in terms of the physical dimensions of the device, also the pins, and the functional mode. But when you’re testing these devices, typically there is a different set of pins that are used to test for wafer sort when you’re testing the wafers. The PTDKs define the location of those pins, the modes, the physical location, the shapes, and all the geometries. Workflows to Support 3D IC Another benefit of a PartModel, and one of its targeted purposes, is to enable a chiplet market ecosystem. Chiplet suppliers can design a chiplet, and if they want to offer that to the market, they can describe all the required information and make it available. This gives chiplet suppliers the ability to define essentially the information about their products in an electronic catalog, in which designers can see the different available parts and choose the ones best suited for their particular design.
Figure 3: Bridging the chasm in the electronics value chain. Thus, chiplet providers can empower prospective customers to search for their chiplet IP and assess functionality, detailed electrical/physical attributes, and available design models. System designers and chiplet consumers can then look through that catalog and also do business transactions. Finally, the 3DK models can be used for the design and verification process, and eventually handed off to manufacturing. Lastly, we are advancing the development of the authoring tools required to create these models. The 3DK models are in CDX format, and this is not a friendly
format for someone to type, so there is a need for an open-source EDA-neutral authoring tool. The goal is to have a single tool that will create each of these 3DK models, and the specific EDA vendors, manufacturers, and assemblers would then use the EDA-specific implementations to create the decks, etc. Toward that end, Siemens EDA introduced Innovator3D IC. Innovator3D IC offers a comprehensive multi-physics cockpit for 3D IC design, verification, and manufacturing to deliver a fast, predictable path for the planning and heterogeneous integration of ASICs and chiplets.
Figure 4: The Innovator3D IC - heterogeneous integration cockpit. As this article has attempted to show, the CDX working group has been hard at work to provide the open source, EDA neutral, machine-readable 3DKs and chiplet
authoring tools that will propel 3D IC heterogeneous integration into the mainstream of electronic systems design. And we’ll be coming to your town very soon.
Figure 2: Chiplet design kit (CDK): JEDEC JEP30 PartModel.
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